tag:blogger.com,1999:blog-469081173588188170.post7482072893555815545..comments2023-12-12T18:23:28.032+05:30Comments on ASIC Design and Verification: STA vs Gate-level SimulationPradeep Vhttp://www.blogger.com/profile/06054281904339010457noreply@blogger.comBlogger1125tag:blogger.com,1999:blog-469081173588188170.post-48255886299690684352018-12-04T15:10:00.730+05:302018-12-04T15:10:00.730+05:30sir i have one doubt that gate level simulation is...sir i have one doubt that gate level simulation is good profile or not<br /><br /><br /><br /><br />LIFE WITH UNEXPECTED TWISThttps://www.blogger.com/profile/00995178675049808613noreply@blogger.com