Hi all,
Consider a case in which there are two systems SystemA & SystemB working with two different clocks clkA (100MHz)& clkB (70MHz) correspondingly. Both these clocks are asynchronous to each other . Data has to be communicated from SystemA to SystemB. SystemA is capable writing 70 words of data in 100 clock cycles, while SystemB is capable of reading data in each and every clock cycle.
Design a FIFO with minimum depth for the above specifications
1 comment:
In order to avoid overflow(i.e data written will be overwritten before it is even read because of slow reading frequency and size of the FIFO) we need to see the worst case data transfer between write and read cycle.......
i.e. take the case
1) Here as per the datum, 70 data in 100 clocks. it means from 1st clock to 70th clock the actual data transfer will be completed(1 clock for 1 data is written) remaining 30 clocks are idle and again new burst starts from 101th clock cycle. Now according to the worst case taken we have to consider the maximum data rate from write side.... it happens if we consider the write periods like this
<---30---><---70---><---70---><---30--->
<--first burst-----><---second burst--->
so 140 clocks of continuous datum
now with in this 140 clocks we need to look out how many reads with specified read frequency is possible.
so 140 * time for each data burst = 140 *(1/100Mhz)
i.e = 1400nsec.
Now total number of reads that can happen with in this time is = 1400nsec * 70 Mhz(freq of read)
=98
so out of 140 throws(writes) only 98 catches(reads) can happen. What about the remaining data ..... it should not be lost.... and we need to save them for the read cycle to continue reading .... which is actually the total old data to be processed first completely what ever the write cycles have stored into.
so 140-98 = 42 Is the depth of the FIFO
hence if we provide this depth to FIFO it basically avoids overflow.... and the old data will be complteley read out before new data is being written.
Thankyou very much.
HAve a nice day........ :)
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